Asutosh Srivastava | Welcome to Jawaharlal Nehru University

Asutosh Srivastava

Assistant Professor

Centre/School/Special Centre

School of Computer & Systems Sciences

Room No

asutosh@mail.jnu.ac.in

Personal Webpage

http://www.jnu.ac.in

Qualifications

M. E., EEE, Nanyang Technological University, Singapore.
Ph. D., ETCE, Jadavpur University.

Areas of Interest/Specialization

VLSI design/Nano-electronics, CAD tools in VLSI design

Experience

Around 8 years Teaching Experience at

Electrical & Electronic Engineering, BITS-Pilani
&
Electronics & Communication Engineering, Indian Institute for Information Technology-DM-Jabalpur

Awards & Honours

Nanyang Technological University, Singapore
CERN, Switzerland, France
DST-JSPS - Tokyo Institute for Technology, Japan
Jenesys- VLSI Design Center, University of Tokyo
IUSSTF-Electrical Engineering, Yale University, USA

International Collaboration/Consultancy

To re-establish

Best Peer Reviewed Publications

* A. Srivastava et.al., , " Study of La-Incorporated HfO₂ MIM Structure Fabricated Using PLD System for Analog/Mixed Signal Applications", IEEE Transaction on Nanotechnology, Vol.14(4) (2015), pp.612-618.

* A.Srivastava, Partha Sarkar, C. K. Sarkar, “Study in variation of Gate Dielectric permittivity with different EOT on channel engineered Deep Sub-micrometer n-MOSFET Device for Mixed Signal Applications” Microelectronics Reliability, vol.49(4) (2009), pp. 365–370.

* D. Zade, S. Sato, K. Kakushima, A. Srivastava, P. Ahmet, K. Tsutsui, A. Nishiyama, N. Sugii, K. Natori, T. Hattori, C. K. Sarkar, and H. Iwai “Effects of La2O3 incorporation in HfO2 gated nMOSFETs on low-frequency noise” Microelectronics Reliability, 51(4) (2011), pp. 746-750.

Recent Peer Reviewed Journals/Books

James E. Morris & Krzysztof Iniewski (editors), "Nanoelectronic Device Applications Handbook", (Devices, Circuits, and Systems) CRC Press (Taylor & Francis Group) ISBN 9781466565234 Article in Section II Nano-CMOS Technology

Patents (if any)